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Cache coherence
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41	Parameterized Verification of the FLASH Cache Coherence Protocol by Compositional Model Checking K. L. McMillan Cadence Berkeley Labs Abstract. We consider the formal verification of the cache coherence Add to Reading List Source URL: www.kenmcmil.com Language: English - Date: 2006-06-02 17:23:24
42	Lecture 1: Introduction and Memory Systems • CS 7810 Course organization:  7 lectures on memory systems  3 lectures on cache coherence and consistency  2 lectures on transactional memory  2 lectures on inte Add to Reading List Source URL: www.eng.utah.edu Language: English - Date: 2014-01-06 12:48:54
43	CACHE COHERENCE DIRECTORIES FOR SCALABLE MULTIPROCESSORS Richard Simoni Technical Report: CSL-TROctober 1992 Computer Systems Laboratory Add to Reading List Source URL: vlsiweb.stanford.edu Language: English - Date: 2009-05-29 13:24:50
44	Modelling and Validation of Shared Memory Coherency Protocols Abstract We present an analytical model of a cache coherent shared-memory multiprocessor and compare the results obtained with those from an execution-driven Add to Reading List Source URL: pubs.doc.ic.ac.uk Language: English - Date: 2011-11-14 07:29:11 Computer hardware Computer memory Parallel computing CPU cache Cache Central processing unit Memory coherence Cell Bus sniffing Cache coherency Computing Computer architecture
45	Automatic Generation of Veriable Cache Coherence Simulation Models from High-level Specications A.J. Field, P.G. Harrison, K. Kanani fajf,pgh, Department of Computing Imperial College Add to Reading List Source URL: pubs.doc.ic.ac.uk Language: English - Date: 2011-11-14 07:17:02 Cache coherence Cache CPU cache Parallel computing Computing Cache coherency Computer hardware
46	Cache Coherence Protocols: Evaluation Using a Multiprocessor Simulation Model JAMES ARCHIBALD and JEAN-LOUP University of Washington BAER Add to Reading List Source URL: ctho.org Language: English - Date: 2005-04-22 14:42:58 Write-once CPU cache Firefly protocol Cache Bus sniffing Cache coherency Computing Computer hardware
47	´ Ecole Polytechnique F´ ed´ erale de Lausanne, Switzerland Add to Reading List Source URL: www.tuxmaniac.com Language: English - Date: 2010-01-19 05:45:28 Cache coherency Parallel computing Computer memory Microprocessors Central processing unit CPU cache Multi-core processor MESI protocol Cache coherence Computing Computer hardware Computer architecture
48	David Whitmarsh \| Shadowmist Ltd Case Study – An Oracle Coherence Data Grid in OSGi Containers Add to Reading List Source URL: www.osgi.org Language: English - Date: 2013-02-05 20:22:03 Java platform Oracle Coherence Java Classloader Oracle Database CPU cache Computing Software OSGi
49	Combing Message Passing and Shared Memory on clusters of PCs with a SMiLE Add to Reading List Source URL: www.compunity.org Language: English - Date: 2007-10-15 03:40:55 Parallel computing Cache coherency Cache Fortran OpenMP CPU cache Cache coherence Lis Computing Computer programming Software
50	Evaluating the Memory Performance of a ccNUMA System Uroˇs Prestor September 5, 2001 Abstract Add to Reading List Source URL: www.sgidepot.co.uk Language: English - Date: 2008-04-15 16:27:00 Computer hardware Cache coherency Central processing unit SGI Origin Cache coherence Symmetric multiprocessing Cache CPU cache R10000 Computing Parallel computing Computer memory

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